A frequency locked loop (FLL) uses a controllable oscillator (e.g., a digitally controlled oscillator) to generate an output signal from a given input signal. Typical designs for the controllable oscillator include crystal oscillators, surface acoustic wave oscillators, LC-tank oscillators, and ring oscillators. Of these types of oscillators, only LC-tank oscillators and ring oscillators lend themselves to integration on a semiconductor substrate.
While LC-tank oscillators are capable of generating accurate clock signals (e.g., low phase noise), they generally require an off-chip inductor or an on-chip spiral inductor. Integrating a high quality inductor onto a standard semiconductor substrate is not trivial, being limited by parasitic effects and the complexity of added non-standard process steps.
As integrated circuit processes have moved to smaller device dimensions and lower supply voltages, inverter-based ring oscillators have become increasingly more attractive over LC-tank oscillators for many applications. However, despite the reductions in integrated circuit device dimensions and supply voltages, the area and power requirements of inverter-based ring oscillators still present drawbacks to their use. Therefore, what is needed is a ring oscillator implementation requiring less area and/or less power as compared to conventional ring-oscillators.
The embodiments of the present disclosure will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.